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Common Emitter Amplifier Questions

Started by sa230e, July 17, 2014, 03:58:37 PM

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Roly

Quote from: sa230eAdmittedly, I used to be in the tubes good, transistors bad camp

They are all just electronic components to me, part of a pallette that nowadays stretches from small signal diodes to entire sub-systems like GPS receivers and systems like the Arduino.

I guess that would be called Drain following, but I think you just coined the term.  The trick is to avoid it (unless you are looking for frequency doubling in a fuzzbox), don't overdrive the stage, use clipping diodes across the signal path to make such overload impossible, design for bags of headroom.

Careful putting resistors in series with the gate - 500k strikes me as too much.  Like a triode these suffer from Miller effect when the tiny stray feedback cap between Drain and Gate is multiplied and can cause an unwanted HF Pole and premature HF rolloff.





If you say theory and practice don't agree you haven't applied enough theory.

Enzo

Not my area of expertise, but it looked to me like your JFET had an unbiased gate on the drawings and scope shots.  I see Roly has added bias to the gate in his drawing.

sa230e

I thought it was the source resistor that sets the bias on a JFET.

Roly

It does - vis a vis the voltage on the Gate.  If we run an MPF102 (coz it's common worldwide) and we simply ground the gate via, say, a 1Meg resistor, then a current of about a mA results in a stage with too little headroom to input overload, your input diode clipping.

By elevating the Gate we can now have our DC cake and AC eat it too.
If you say theory and practice don't agree you haven't applied enough theory.